The present invention pertains to the field of flat panel display screens. More specifically, the present invention relates to the field of flat panel field emission display screens.
Flat panel field emission displays (FEDs), like standard cathode ray tube (CRT) displays, generate light by impinging high energy electrons on a picture element (pixel) of a phosphor screen. The excited phosphor then converts the electron energy into visible light. However, unlike conventional CRT displays which use a single or in some cases three electron beams to scan across the phosphor screen in a raster pattern, FEDs use stationary electron beams for each color element of each pixel. This requires the distance from the electron source to the screen to be very small compared to the distance required for the scanning electron beams of the conventional CRTs. In addition, FEDs consume far less power than CRTs. These factors make FEDs ideal for portable electronic products such as laptop computers, pagers, cell phones, pocket-TVs, personal digital assistants, and portable electronic games.
One problem associated with the FEDs is that the FED vacuum tubes may contain minute amounts of contaminants which can become attached to the surfaces of the electron-emissive elements, faceplates, gate electrodes, focus electrodes, (including dielectric layer and metal layer) and spacer walls. These contaminants may be knocked off when bombarded by electrons of sufficient energy. Thus, when an FED is switched on or switched off, there is a high probability that these contaminants may form small zones of high pressure within the FED vacuum tube.
In addition, electron emission from the emitter electrodes to the gate electrodes can cause both emitter and gate degradation. For instance, the gate is positive with respect to the emitter causing an attraction of electrons from the emitter electrodes to the gate electrodes. In addition, the presence of the high pressure facilitates electron emission from emitters to gate electrodes. The result is that some electrons may strike the gate electrodes rather than the display screen. This situation can lead to gate electrode degradation including overheating of the gate electrodes. The emission to the gate electrodes can also affect the voltage differential between the emitters and the gate electrodes. Electron emission from the emitter electrodes to the gate electrodes can also cause ions and other material debris to be released from the gate and thereby become attached to the emitter electrode. This can cause emitter degradation.
It is worth noting that electrons may also hit spacer walls and focus electrodes, causing non-uniform emitter degradation. Problems occur when electrons hit any surface except the anode, as these other surfaces are likely to be contaminated and outgas because they are not scrubbed by the electron beam during normal tube operation. In addition, as the electrons jump the gap between the electron-emissive elements and the gate electrode, a luminous discharge of current may also be observed. Severe damage to the delicate electron-emitters may also result. Naturally, this phenomenon, generally known as xe2x80x9carcing,xe2x80x9d is highly undesirable.
Conventionally, one method of avoiding the arcing problem is by manually electron scrubbing the FED vacuum tubes to remove contaminant material. However, it is difficult to remove all contaminants with that method. Further, the process of manual scrubbing is time-consuming and labor intensive, unnecessarily increasing the fabrication cost of FED screens.
Cathode burn-in is a technique to condition a FED screen. FIG. 1 is a cross section structural view of part of a flat panel FED unit 75 that utilizes a gated field emitter 40 with spacer walls 17 and a focus waffle 10. The electron emitter 40 is electrically coupled to a cathode structure 60. During the cathode burn-in process, the emitter current is gradually raised up to its normal full bright level and the anode 20 is generally held to a low voltage, e.g., 750 volts, which is just high enough for electrons emitted from the emitter 40 to escape the focus wells 11, but low enough to minimize the occurrences of damaging arcs. Cathode burn-in is a conditioning step and is typically performed after the tube has been sealed but not yet run.
The process of cathode burn-in performs at least two functions which cannot be performed well at high anode voltage conditions. The first is that cathode burn-in techniques forward bias the emitters 40 and allow inevitable xe2x80x9cblow-outsxe2x80x9d (e.g., shorts) to occur under low anode voltage conditions where they are much less likely to cause damaging faceplate-cathode arcs described above. The second function performed by cathode burn-in techniques is that they perform an important out-gassing function by cracking and pumping non-getterable gases with emitted electrons. For instance, cathode burn-in techniques ionize gases thereby making them more reactive and therefore more likely to be captured by the getter or other parts of the display. Further, by ionizing the gases, they are driven into the faceplate and are thereby pumped. Typically, the tubes begin cathode burn-in with a high pressure (10xe2x88x924 Torr) of methane gas which is mostly pumped away by the end of cathode burn-in.
A serious problem with prior art cathode burn-in techniques stems from emitted electrons hitting the spacer walls 17 (FIG. 1) thereby causing display non-uniformities near the spacer walls. During cathode burn-in, the emitters near the spacer walls experience a different concentration of gas molecules and ion sputtering than those located away from the spacer walls. This is a result of the high gas pressure in the tube and the low voltage applied to the anode 20. This difference causes display non-uniformities in the tube after cathode burn-in. These unwanted display non-uniformities in the tube may persist or emerge later in the life of the tube.
The low anode voltage applied during cathode burn-in allows the electron beam 14 to spread out more than during normal high anode voltage operation so many electrons 12a, 12b hit the spacer walls 17. When hit by low energy electrons (e.g.,  less than 1000 ev), the spacers walls emit secondaries and charge. The charged walls 17 deflect the electrons causing a non-uniform current density into the faceplate 70 near the spacer walls 17. This causes non-uniform faceplate outgassing which may effect nearby emitters. The spacer walls 17 also may outgas under electron bombardment. The secondary electrons from the spacer walls themselves 17 ionize gas molecules which sputter the cathode adjacent to the spacer wall more than those that are located further away. Typically, these anomalies near the spacer walls 17 cause the rows around the spacer walls (e.g., for spacers running in the direction of the rows) to emit more electrons than those further from the spacer walls by the end of cathode burn-in conditioning thereby causing display non-uniformities.
Accordingly, it would be advantageous to reduce or eliminate the display non-uniformities described above while maintaining the benefits of cathode burn-in conditioning. Embodiments of the present invention are directed as alternatives to cathode burn-in conditioning which prevent these non-uniformities by collecting the emitted electrons at the cathode so that very few or none of the emitted electrons hit the spacer walls of the faceplate. According to the present invention, the electrons can be collected either by the metal layers of the cathode or by the focus waffle. By preventing electrons from hitting the spacer walls during cathode burn-in conditioning, the present invention reduces or eliminates the display non-uniformities described above while maintaining the benefits of cathode burn-in. These and other advantages of the present invention not specifically described above will become clear within discussions of the present invention herein.
Methods for performing cathode burn-in with respect to an FED display are described herein that avoid display non-uniformities near and around the spacer wall structures. In a first method, the anode is floated or receives a negative voltage (e.g., 100-500 volts or more) with respect to the electron emitter. A positive voltage (e.g., 40-100 volts, for instance) is then applied to the focus waffle structure with respect to the electron emitter. The cathode is then energized (e.g., 30 volts) thereby preventing emitted electrons from escaping the focus well. Under these conditions, cathode burn-in conditioning can occur but electrons are energetically forbidden from hitting the anode or the spacer walls except for a small region near the focus waffle.
Under the second method, the anode is grounded or allowed to float. A negative bias is applied to the focus waffle (e.g., 20 volts or more with respect to the emitters). This causes electrons to be collected at the M2 layer of the gate. Under these conditions, the negative focus voltage xe2x80x9cpinches offxe2x80x9d the potential of the top of the focus waffle so that no electrons can escape out to hit the faceplate or wall. Electrons are energetically forbidden from hitting any portion of the tube except the M2 layer.
Under either method, no electrons hit the spacer walls and therefore display non-uniformities near and around the spacer wall structures are avoided. Also, under either method, metal layers M1 and M2 of the gate are biased under the usual operating conditions of the tube so that electrons are emitted from the tips. As with normal cathode burn-in procedures, inevitable xe2x80x9cblow-outsxe2x80x9d can occur and the emitted low energy electrons will crack non-getterable gas molecules. The tube can operate in conditioning mode from the normal period of cathode burn-in, e.g., about 1 hour.
More specifically, a first embodiment of the present invention is directed toward a method for performing cathode conditioning with respect to a field emission display device comprising: rows and columns of pixels; an anode electrode; a focus waffle structure; and spacer walls disposed between the anode electrode and the focus waffle structure, wherein each of the pixels comprises respective emitter and gate electrodes, the method comprising the steps of: a) biasing the focus waffle structure with a positive voltage with respect to the emitter electrode; b) biasing the anode electrode with a voltage level that is floating or negative; and c) biasing the emitter electrode such that electrons are emitted from tips of the emitter electrode, wherein the emitted electrons are directed toward the focus waffle structure and are energetically forbidden from reaching any substantial portion of the spacer walls. As one example, the positive voltage of step a) is within the range of approximately 40 to 100 volts and the anode electrode is biased to a negative voltage level within the range of approximately 100 to 500 volts at the step b).
A second embodiment of the present invention is directed toward a method for performing cathode conditioning with respect to a field emission display device comprising: rows and columns of pixels; an anode electrode; a focus waffle structure; and spacer walls disposed between the anode electrode and the focus waffle structure, wherein each of the pixels comprises respective emitter and gate electrodes, the method comprising the steps of: a) biasing the focus waffle structure with a negative voltage with respect to the emitter electrode; b) biasing the anode electrode with a voltage level that is floating or grounded; and c) biasing the emitter electrode such that electrons are emitted from tips of the emitter electrode, wherein the emitted electrons are directed toward the gate electrode and are energetically forbidden from reaching any substantial portion of the spacer walls. As one example, the negative voltage of step a) is within the range of approximately 20 volts or more.
In either embodiment, the emitter electrode comprises a first metal layer and a second metal layer and wherein the step c) comprises the step of: c1) over a first time period, ramping a bias voltage (the xe2x80x9crampxe2x80x9d) applied across the first and second metal layers from a first predetermined level to a second predetermined level; and c2) over a second time period, maintaining the second (xe2x80x9cthe soakxe2x80x9d) predetermined level.
A third embodiment of the present invention is directed toward a method for performing cathode conditioning with respect to a field emission display device comprising: rows and columns of pixels; an anode electrode; a focus waffle structure; and spacer walls disposed between the anode electrode and the focus waffle structure, wherein each of the pixels comprises respective emitter and gate electrodes, the method comprising the steps of: performing a cathode conditioning process of a first duration before the field emission display device is used for normal display operations; and upon subsequent normal power-on of the field emission display device, performing cathode re-conditioning process of a second duration, wherein the second duration is significantly shorter than the first duration and wherein the conditioning and reconditioning processes described above may be performed using the first or second embodiment described above.